MVS Schematics for massive trace issue? WORKS!

[KmanSweden]

Hi.
I'm helping out a friend with a Video RAM replacement.. Well actually, a previus owner had pulled out the RAM so I need to totally rewire the ram.
I've managed to replace all "visible" trace with thin red wire but I still get Video 8000 0000 0100.. So i'm guessing theres some hidden traces to some of the "empty" pins..
This is what we had to start with..

IMG_4602b.jpg

[Rossyra]

http://wiki.neogeodev.org/index.php?tit ... schematics"

[KmanSweden]

Not in my Pdf. I'll dig out my paper one and have a look.

Edit: nope..

[KmanSweden]

http://wiki.neogeodev.org/index.php?tit ... schematics

Thanks!

[leonardoliveira]

Hi.
I'm helping out a friend with a Video RAM replacement.. Well actually, a previus owner had pulled out the RAM so I need to totally rewire the ram.
I've managed to replace all "visible" trace with thin red wire but I still get Video 8000 0000 0100.. So i'm guessing theres some hidden traces to some of the "empty" pins..
This is what we had to start with..

IMG_4602b.jpg

By looking at that picture and what bit the BIOS reports as bad I can even tell you which trace is bad without a schematic ...

Horrible damage btw !

Try pin 11 of the chip which is closer to the viewer.

[KmanSweden]

By looking at that picture and what bit the BIOS reports as bad I can even tell you which trace is bad without a schematic ...

Horrible damage btw !

Try pin 11 of the chip which is closer to the viewer.

Cool. Try it how?

[KmanSweden]

Here's what I'm looking at now.

[leonardoliveira]

Did it work after all that bridging action, mate ?

[Rossyra]

There's your problem right there.

It's the red weed from War of the Worlds.

In all seriousness, these boards can end up totally goosed from a battery leak, has that happened here by any chance? Just wondering because I have one that looks like that and I've never got to the bottom of it yet. It's turning into my life's project.

What board is it? Did the previous owner butcher it for the RAM only, or was he actually trying to fix it?

[KmanSweden]

God morning, Gents.
It's NeoGeo 2-slot mobo I'm trying to fix for a friend. It was missing the RAM's completely and there was massive trace damage in and around where the RAM's used to be.
I got the board, new RAM and a prayer from my friend. We're not going for pretty here. We're aiming for "It's Alive!!!"

I got to 8000 5555 55FE or something before I realized that they didn't even get +5v because the traces are so **** up (hence the big pink wires).
I'll try looking at the schematics again today, hoping Leo will pop back in with a clarification about PIn 11..

[Hewitson]

Wow.. What was the ram desoldered with? A blowtorch?

[KmanSweden]

Wow.. What was the ram desoldered with? A blowtorch?

My guess is something that wasn't hot enough.

[leonardoliveira]

Well, this a breakdown of what the NEO GEO BIOS is trying to tell you:

ADDRESS Written READ
8000 5555 55FE

So now you're worse now than when you had 8000 0000 0100. That means the lower SRAM chip probably didn't even receive any control strobe.
It's important to keep in mind that for a successful write the RAM chip require a certain configuration on the pins. Also for read another configuration is required:



For a write, pins /CS (Chip Select or /CE Chip Enable enables the core of the chip for access). The chip will be ready but will only accept a write after an low pulse is applied also to /WE (Write Enable).

For a read, you want to pulse pins /CS and /OE (output enable).

On the use given for the chips on the NEO GEO, the chips are aways enabled. Since the RAMs are not in a bus, but connected straight to the LSPC chip, the /CS and /OE pins are tied straight to GND (meaning the chips will be aways active and on read mode). Setting /WE low causes the chip to enter on write mode regardless of the state of /OE pin. SNK exploited that behavior to simplify the circuit and save one pin on the LSPC chip. So make sure pins 18 and 20 on both chips are connected to GND... Also very important that pin 21 is tied on the two chips and connected to LSPC-A2 pin 86. That's the write strobe.

Since the chips are 8 bit, you need two to form the 16 bit bank the LSPC chip need. Address lines (C0-C10 and the CWE write control strobe are tied together on the two RAM chips).


This memory bank in particular is used by the LSPC chip to draw the stripes which form the playfield (Aka everything that is not FIX) which is basically where the game graphical action happens.

So as reference use the LSPC-A2 pinout:

http://wiki.neogeodev.org/index.php?title=LSPC2-A2"

The fast SRAM is connected to it as "VRAM Bank 1".

Make sure all traces to to each chip (SRAMS and LSPC) are alright.

[KmanSweden]

So now you're worse now than when you had 8000 0000 0100.

No,no, no. I have 8000 0000 0100 now. I had 8000 5555 55FE before hooking up the 5v ang GND (big pink wires).

Thanks for the write up.
So 1.) I'll check grounding on pins 18 and 20. (x2)
2.) Check continouty (spelled the crap out of that word..) from pin 21's to LSPC-A2 pin 86. (x2)
3.) Probe CS, WE and OE for signals.. (x2)

Cheers.

[leonardoliveira]

So now you're worse now than when you had 8000 0000 0100.

No,no, no. I have 8000 0000 0100 now. I had 8000 5555 55FE before hooking up the 5v ang GND (big pink wires).

Thanks for the write up.
So 1.) I'll check grounding on pins 18 and 20. (x2)
2.) Check continouty (spelled the crap out of that word..) from pin 21's to LSPC-A2 pin 86. (x2)
3.) Probe CS, WE and OE for signals.. (x2)

Cheers.

CS and OE are tied to GND so there won't be any signal on them.

All Axx pins are connected together on both chips and then go to LSPC2-A2. Dx pins go individually to the pins marked F-xx on LSPC-A2.

[KmanSweden]

Works!
Final shot of the repair.

Thanks for all the help. You're all awesome.

[Asure]

Oh dear, what a job. But, it must give you a good feeling knowing you could save & repair this board from the stone cold torture it endured under its previous owner.



Saddens me to see what some people do to old hardware.

[KmanSweden]

This is how I figured where to check continuity, if someone was wondering..

mvs2slot.JPG

A8 had no continuity to pin 97 on the LSPC2-A2 so a wire was needed between these points to clear the 8000 0000 0100 error message.

[bochi]

could you post a tutorial to see where exactly each pin goes to I have a 2 slot that I got for free on a bundle and the owner tried to fix the bad ram and ripped all the traces as well.

[KmanSweden]

Frankly, no.
I don't have even have the board here any more.
Everything you need should be here...
1.) The pinout of the RAM.
2.) The schematics. (Picture 2 from the top) will give you what pin number it's supposed to be connected to on the LSPC2-A2.
3.) The pinout of the LSPC2-A2
4.) Leo's last post before this post.