dj_johnnyg's FFS more dead stuff thread

PCB problems and fixes
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dj_johnnyg
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Re: dj_johnnyg's FFS more dead stuff thread

Post by dj_johnnyg »

Asayuki wrote:I don't really get it. According to the schematic, the 24MHz pixel clock goes into NEO-D0 which then generates 68KCLK and 68KCLKB. As far as I can see 68KCLK only feeds the 68K itself and NEO-C1 which looks like addressing logic only. If NEO-D0 has a broken/badly soldered/fried 68KCLK output, this shouldn't prevent garbage from appearing on screen. The RGB DAC itself gets a clock called 6M (or 6H?) as far as I understand.
Have you got a decent copy of the schematic you could link to at all? I'm taking the board to work on Monday and hooking it up to the scope, so that would be useful.

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Re: dj_johnnyg's FFS more dead stuff thread

Post by Asayuki »

dj_johnnyg wrote:Have you got a decent copy of the schematic you could link to at all?
Not really. I use the following ones, which I guess are the crappy ones you are referring to. The AES version is much more readable, so you just need to work out from the MVS ones the few things which are different.

https://wiki.neogeodev.org/index.php?title=Schematics
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Re: dj_johnnyg's FFS more dead stuff thread

Post by leonardoliveira »

Basically the main CPU BUS stuff is identical on AES and MVS besides the MVS specific stuff which AES lacks (dip switches, backup memory, SFIX/SM1 to cartridge toggle register and calendar IC). So you should follow Asayuki's advice and have a look on the AES schematics. When I mentioned you had to check CPU bus connections I should also have mentioned you have to actually test the CPU RAM chips. Also test the ROM, which should be in a socket.

CPU clock is derived from the master 24Mhz oscillator, as every single other clock on the neogeo. But, it's very unlikely that any of the specific outputs can fail without affecting the others. But nonetheless it could happen. I just never seen that happen (caused by chip failure) but I've seen it fail due to corroded traces before.

edit: Worth noticing that MVS does not have a PLL on the clock generator because it does not need to deal with a RGB encoder and dot crawl issues on composite video. So it simply has a 24Mhz (exact frequency) oscillator and no PLL feedback/varicap diode voltage controlled trimmer circuitry.
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Re: dj_johnnyg's FFS more dead stuff thread

Post by dj_johnnyg »

Cheers! The AES one is certainly much easier to read :awe:

I built a logic probe yesterday and had a quick prod around (mainly to test it worked) and will sit down later this week & map everything out.

Should I get a pulse signal from the crystal? I got absolutely nothing from it.
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Re: dj_johnnyg's FFS more dead stuff thread

Post by leonardoliveira »

Depends, if you have no pulses on the crystal, you will have no video because the video chips can't generate video without the clock to time them up. I'd say your measurement tool knocked the oscillator out and made it stop oscillating when you connected the probe. Test with the video display connected and check if video stops displaying when you attach the test probe.

Another (more likely) possibility is that the oscillation is too fast for your probe to acknowledge.
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